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74hc4075-q100; 74hct4075-q100 triple 3-input or gate

74HC4075-Q100;
74HCT4075-Q100
Triple 3-input OR gate

Rev. 1 — 22 May 2013
Product data sheet
1. General
description
The 74HC4075-Q100; 74HCT4075-Q100 is a triple 3-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
 Automotive product qualification in accordance with AEC-Q100 (Grade 1)  Specified from 40 C to +85 C and from 40 C to +125 C  Complies with JEDEC standard JESD7A Input levels:  For 74HC4075-Q100: CMOS level For 74HCT4075-Q100: TTL level  MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) 3. Ordering
information
Ordering information
Type number
Temperature range
Description
plastic small outline package; 14 leads; plastic thin shrink small outline package; NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
4. Functional
Logic symbol
IEC logic symbol
Logic diagram (one gate)
5. Pinning
information
5.1 Pinning
+&4
+&74
+&4
+&74
Pin configuration SO14
Pin configuration TSSOP14
5.2 Pin description
Pin description
Description
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
6. Functional
description
Function sele
H = HIGH voltage level; L = LOW voltage level; X = don’t care 7. Limiting
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Parameter
Conditions
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
8. Recommended operating conditions
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V) Symbol Parameter
Conditions
74HC4075-Q100
74HCT4075-Q100
9. Static
characteristics
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter
Conditions
40 C to +85 C 40 C to +125 C Unit
74HC4075-Q100
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter
Conditions
40 C to +85 C 40 C to +125 C Unit
74HCT4075-Q100
other inputs at VCC or GND; VCC = 4.5 V to 5.5 V 10. Dynamic characteristics
Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circ Symbol Parameter
Conditions
40 C to +125 C Unit
(85 C)
(125 C)
74HC4075-Q100
power dissipation per package; VI = GND to VCC All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
Dynamic characteristics …continued
GND = 0 V; CL = 50 pF; for test circuit see Figure 7. Symbol Parameter
Conditions
40 C to +125 C Unit
(85 C)
(125 C)
74HCT4075-Q100
CPD is used to determine the dynamic power dissipation (PD in W):P fi = input frequency in MHz;fo = output frequency in MHz;CL = output load capacitance in pF;VCC = supply voltage in V;N = number of inputs switching; (C  11. Waveforms
VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays
Measurement points
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
RT = termination resistance should be equal to output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
Test circuit for measuring switching times
Test data
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
12. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES
EUROPEAN
ISSUE DATE
PROJECTION
Package outline SOT108-1 (SO14)
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
DIMENSIONS (mm are the original dimensions)
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
EUROPEAN
ISSUE DATE
PROJECTION
Package outline SOT402-1 (TSSOP14)
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
13. Abbreviations
Table 10.
Abbreviations
Description
Low-power Schottky Transistor-Transistor Logic 14. Revision history

Table 11.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
15. Legal information
15.1 Data
Document status
Product statu
Definition
This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL . 15.2 Definitions
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
Draft — The document is a draft version only. The content is still under
authorized or warranted to be suitable for use in life support, life-critical or internal review and subject to formal approval, which may result in safety-critical systems or equipment, nor in applications where failure or modifications or additions. NXP Semiconductors does not give any malfunction of an NXP Semiconductors product can reasonably be expected representations or warranties as to the accuracy or completeness of to result in personal injury, death or severe property or environmental information included herein and shall have no liability for the consequences of damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or Short data sheet — A short data sheet is an extract from a full data sheet
applications and therefore such inclusion and/or use is at the customer's own with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and Applications — Applications that are described herein for any of these
full information. For detailed and full information see the relevant full data products are for illustrative purposes only. NXP Semiconductors makes no sheet, which is available on request via the local NXP Semiconductors sales representation or warranty that such applications will be suitable for the office. In case of any inconsistency or conflict with the short data sheet, the specified use without further testing or modification. Customers are responsible for the design and operation of their applications Product specification — The information and data provided in a Product
and products using NXP Semiconductors products, and NXP Semiconductors data sheet shall define the specification of the product as agreed between accepts no liability for any assistance with applications or customer product NXP Semiconductors and its customer, unless NXP Semiconductors and design. It is customer’s sole responsibility to determine whether the NXP customer have explicitly agreed otherwise in writing. In no event however, Semiconductors product is suitable and fit for the customer’s applications and shall an agreement be valid in which the NXP Semiconductors product is products planned, as well as for the planned application and use of deemed to offer functions and qualities beyond those described in the customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 15.3 Disclaimers
NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s Limited warranty and liability — Information in this document is believed to
third party customer(s). Customer is responsible for doing all necessary be accurate and reliable. However, NXP Semiconductors does not give any testing for the customer’s applications and products using NXP representations or warranties, expressed or implied, as to the accuracy or Semiconductors products in order to avoid a default of the applications and completeness of such information and shall have no liability for the the products or of the application or use by customer’s third party consequences of use of such information. NXP Semiconductors takes no customer(s). NXP does not accept any liability in this respect.
responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
In no event shall NXP Semiconductors be liable for any indirect, incidental, damage to the device. Limiting values are stress ratings only and (proper) punitive, special or consequential damages (including - without limitation - lost operation of the device at these or any other conditions above those given in profits, lost savings, business interruption, costs related to the removal or the Recommended operating conditions section (if present) or the replacement of any products or rework charges) whether or not such Characteristics sections of this document is not warranted. Constant or damages are based on tort (including negligence), warranty, breach of repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards Terms and conditions of commercial sale — NXP Semiconductors
customer for the products described herein shall be limited in accordance products are sold subject to the general terms and conditions of commercial with the Terms and conditions of commercial sale of NXP Semiconductors.
sale, as published at unless otherwise agreed in a valid written individual agreement. In case an individual Right to make changes — NXP Semiconductors reserves the right to make
agreement is concluded only the terms and conditions of the respective changes to information published in this document, including without agreement shall apply. NXP Semiconductors hereby expressly objects to limitation specifications and product descriptions, at any time and without applying the customer’s general terms and conditions with regard to the notice. This document supersedes and replaces all information supplied prior purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
No offer to sell or license — Nothing in this document may be interpreted or
Translations — A non-English (translated) version of a document is for
construed as an offer to sell products that is open for acceptance or the grant, reference only. The English version shall prevail in case of any discrepancy conveyance or implication of any license under any copyrights, patents or between the translated and English versions.
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
15.4 Trademarks
may be subject to export control regulations. Export might require a prior authorization from competent authorities.
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 May 2013
NXP Semiconductors
74HC4075-Q100; 74HCT4075-Q100
Triple 3-input OR gate
17. Contents
Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’. NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.comFor sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 22 May 2013
Document identifier: 74HC_HCT4075_Q100

Source: http://www.hestore.hu/files/74hct4075.pdf

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